Through hole (via) is one of the important components of multilayer PCB board, and the cost of drilling usually accounts for 30% to 40% of the cost of PCB board. Simply put, every hole in the PCB can be called a pass hole.
In terms of function, pores can be divided into two categories:
One is used as an electrical connection between the layers;
The second is used for fixing or positioning devices.
In terms of technological process, these holes are generally divided into three categories, namely blind via, buried via and through via.
1. Blind hole
Located on the top and bottom surfaces of the printed circuit board, with a certain depth for the connection of the surface circuit and the inner circuit below, the depth of the hole usually does not exceed a certain ratio (aperture).
2. Bury the hole
A connection hole located in the inner layer of the printed circuit board that does not extend to the surface of the printed circuit board. Both types of holes are located in the inner layer of the circuit board, which is completed by a through-hole molding process prior to lamination. Several inner layers may be overlapped during the through-hole formation process.
3, through the hole
This hole runs through the entire circuit board and can be used for internal interconnection or as an installation positioning hole for components.
Because the through hole in the process is easier to achieve, the cost is lower, so most of the printed circuit board uses it, rather than the other two through holes. The following mentioned through holes, without special instructions, are considered as through holes.
From the design point of view, a through hole is mainly composed of two parts, one is the drill hole in the middle, and the other is the welding pad area around the drill hole. The size of these two parts determines the size of the hole. Obviously, in the design of high speed, high density PCB, EDA365 electronic forum like the designer, always hope that the smaller the hole, the better, this template can leave more wiring space, in addition, the smaller the hole, its own parasitic capacitance is smaller, more suitable for high speed circuit. But as hole sizes get smaller, they cost more, and don't keep getting smaller. It's limited by technology such as drill and plating. The smaller the holes, the longer it takes to drill, and the more off-center it gets. When the hole depth is more than 6 times the diameter of the hole, it is impossible to guarantee the uniform copper plating on the hole wall.
For example, if a normal 6-layer PCB board has a thickness (through hole depth) of 50Mil, then the PCB manufacturer can only provide a hole diameter of 8Mil under normal conditions.
With the development of laser drilling technology, the size of drilling can also be smaller and smaller. Generally, the diameter of the hole is less than or equal to 6Mil, we call it microhole. Microholes are often used in the design of HDI (high density interconnect structure). Microhole technology allows the hole to be punched directly into the pad (Via-in-pad), which greatly improves circuit performance and saves wiring space.
The hole appears as an impedance discontinuous break point on the transmission line, causing the signal to reflect. Generally, the equivalent impedance of the hole is about 12% lower than that of the transmission line. For example, the impedance of the transmission line of 50 ohms will be reduced by 6 ohms when it passes through the hole (specific and the size of the hole, plate thickness is also related, not reduced).
But the reflection caused by the impedance discontinuity through the hole is actually very small
The problem of through hole is more focused on the effect of parasitic capacitance and inductance.
1. Parasitic capacitance through the hole
There is a parasitic capacitance to the ground through the hole itself. If the diameter of the isolation hole through the hole on the paving layer is D2, the diameter of the welding plate through the hole is D1, the thickness of the PCB board is T, and the dielectric constant of the substrate is ε, then the parasitic capacitance through the hole is approximately as follows:
The main effect of the parasitic capacitance through the hole on the circuit is to prolong the rise time of the signal and reduce the speed of the circuit.
For example, for a PCB board with a thickness of 50Mil, if a through-hole with an inner diameter of 10Mil, a diameter of 20Mil of the pad is used, and the distance between the pad and the copper floor area is 32Mil, then we can approximate the parasitic capacitance of the through-hole through the above formula:
C=1.41x4.4x0.050x0.020/ (0.032-0.020) =0.517pF
The variation of rising time caused by this part of capacitance is:
T10-90=2.2C (Z0/2) =2.2x0.517x (55/2) =31.28ps
From these values, it can be seen that although the effect of the rise delay caused by the parasitic capacitance of a single hole is not very obvious, but if multiple holes are used in the wiring to switch between layers, the EDA365 electronic forum reminds the designer to consider carefully.
2. Parasitic inductance through the hole
Similarly, there is also a parasitic inductance when there is a parasitic capacitance through the hole. In the design of high-speed digital circuits, the harm caused by the parasitic inductance through the hole is often greater than the influence of the parasitic capacitance. Its parasitic series inductance will weaken the contribution of the bypass capacitance and reduce the filtering effectiveness of the whole power system.
We can use the following formula to simply calculate the parasitic inductance of a through-hole approximation:
L=5.08h [ln (4h/d) +1]
Where L refers to the inductance of the hole, h is the length of the hole, and d is the diameter of the central hole. It can be seen from the formula that the diameter of the through hole has little influence on the inductance, while the influence on the inductance is the length of the through hole.
Using the above example again, the inductance of the hole can be calculated as:
L=5.08x0.050 [ln (4x050/0.010) +1] =1.015nH
If the rise time of the signal is 1ns, its equivalent impedance is:
XL = 3.19 Ω PI L/T10-90
Such impedance can no longer be ignored in the presence of high frequency current. In particular, note that the bypass capacitor needs to pass through two holes when connecting the power layer to the formation, so that the parasitic inductance of the holes will be multiplied.
3. Hole design in high-speed PCB
Through the above analysis of the parasitic characteristics of the holes, we can see that in high-speed PCB design, seemingly simple holes often bring great negative effects to the circuit design.
In order to reduce the adverse effects brought by the parasitic effect of the hole, the following contents can be arranged as far as possible in the design:
A, from the perspective of cost and signal quality, choose a reasonable size of the hole. For example, for the design of 6-10 layers of memory module PCB, it is better to choose 10/20Mil (drill/pad) pass hole, for some high-density small size boards, you can also try to use 8/18Mil pass hole.
With current technology, it is difficult to use smaller holes. For the power supply or ground wire hole can be considered to use a larger size, to reduce the impedance.
B. From the two formulas discussed above, it can be concluded that the use of thinner PCB board is beneficial to reduce the two parasitic parameters through the hole.
C, power and ground pins should be drilled nearby, the shorter the lead between the hole and the pin, the better, because they will cause an increase in inductance. At the same time, power and ground leads should be as thick as possible to reduce impedance.
D. The signal routing on the PCB board should not change layers as far as possible, that is to say, unnecessary holes should be reduced as far as possible.
E. Place some grounded through-holes near the through-holes of signal switching to provide a close loop for the signal. You can even put a lot of extra ground holes on the PCB board. Of course, you need to be flexible in your design.
The perforated model discussed above is the case that each layer has pads. Sometimes, we can reduce or even remove the pads of some layers.
Especially in the case of very large pore density, it may lead to the formation of a fault slot that cuts off the circuit in the copper layer. To solve this problem, in addition to moving the position of the hole, we can also consider reducing the size of the solder pad in the copper layer.
How to use the hole: Through the above analysis of the parasitic characteristics of the hole, we can see that in high-speed PCB design, seemingly simple improper use of the hole will often bring great negative effects to the circuit design.